On Eecient Embeddings of Grids into Grids in Parix ?

A hardware independent method of programming a massively parallel machine (MPP) can best be supported by a well-designed run-time environment. An important problem in this design is the ability of eeciently simulating networks diierent from the hardware topology. We will describe the mapping kernel of the virtual processors library for the commercial run-time system PARIX 3. This kernel contains description classes for several topologies (so-called virtual topologies) and implementations of respective embeddings which map given instances of virtual topologies onto others or onto the hardware. Using these functions , PARIX is able to establish concrete virtual topologies with corresponding communication channels. The implemented functions were selected with respect to the well-known criteria for graph embeddings: equal load and small dilation. Additionally, we focus on fast distributed computation and universal applicability. As an example, we will show new methods for eeciently embedding an arbitrary 2-dimensional grid as a guest graph into any 2-dimensional grid as a host graph.